Each year noted industry analyst Gary Smith, of Gartner Dataquest, publishes a list of the most exciting products at the DAC conferenced.
These in-depth demos provide an intimate look at some of Gary's 2004 picks. Scroll down or select a company from the list below.
Apex Design Systems'
core competence is design reoptimization. Apex is the industry's leader in physical
optimization through space propagation. Space propagation redistributes the space in a chip or module to achieve
better routability, area, timing, power and yield. The technology also maintains relative locations of standard
cells and can therefore iteratively improve a design to achieve better quality of results.
Compex-RT Demo
Compex-RT is a space propagation tool for improving routability and/or
achieve die size reduction. This demo will include Compex-RT's usable
space analysis, routability analysis, timing analysis, and space propagation
for improved routability and die size reduction.
Beach
Solutions aims to establish itself as the recognized
world leader in IP packaging, integration and re-use.
Our automatic generation technology will allow Beach
Solutions to continue to grow profitably by automating
the production of new tools to the benefit of its customers
in the dynamic System-on-Chip development markets.
EASI-Studio™ EASI-Studio will increase the productivity of your entire team.
No more documentation or specification version issues! Just imaging how creative you and your team can be...
Cadence
is the world's largest supplier of EDA technologies
and engineering services. Cadence helps its customers
break through their challenges by providing a new generation
of electronic design solutions that speed advanced IC
and system designs to volume.
CeltIC
Witness how CeltIC and Fire & Ice QXC are used for extraction,
signal integrity analysis, and repair within the SoC
Encounter flow. This highly accurate combination filters
out most false signal integrity violations, thus enabling
rapid signal integrity closure with sign-off quality
results.
GigaScale
IC is an electronic design automation (EDA) pioneer
developing the first specification optimization system
for integrated circuit (IC) design.
InCyte®
InCyte® is a revolutionary new specification optimization
system that dramatically reduces the risk, design time
and cost of IC design. It accurately estimates key IC
specifications including; size, power, leakage, speed,
cost, and yield.
Magma
Design Automation provides electronic design
automation (EDA) software that enables chip designers
to meet critical time-to-market objectives, improve
chip performance and handle multimillion-gate designs.
With headquarters in Silicon Valley and a global network
of sales & support personnel, Magma customers include
leading semiconductor companies around the world.
BlastPower™
Blast Power provides a comprehensive RTL-to-GDSII solution
for power optimization and management. Optimal power
management is enabled throughout the implementation
flow with power-aware synthesis, physical optimization
and routing, enabling designers to minimize power and
ensure uniform power distribution. Blast Power is fully
integrated with Magma’s RTL-to-GDSII implementation
flow to enable continuous power, timing, area tradeoffs
throughout the design flow.
Manhattan
Routing is a privately held Silicon Alley based
EDA company founded in February 1997. We provide a tool
suite targeting the "Timing Closure" phase of the IC
design flow through products that provide physical vizualisation
capabilties to the front-end design teams, and a suite
of physically aware timing report analysis functions
together with associated fixing capabilties.
Timing Closure with Physical Window and Optimization Cockpit
Physical Window™/Optimization Cockpit™ (PW/OC) is a
timing closure tool package that allow effective and
timely closure of the last 100 violating paths of large
high performance ASICs. Through the concept of a "timing
sensitized layout" the tool suite enables analysis of
the timing problems within the physical context. This
functionality ranges from visualization of the timing
paths in the physical domain to classification of timing
problems based on the domain (logical or physical) of
origin.
Mentor
Graphics is a technology leader in electronic design automation (EDA), providing software and hardware
design solutions that enable companies to develop better electronic products faster and more cost-effectively.
The company offers innovative products and solutions that help engineers overcome the design challenges they
face in the increasingly complex worlds of board and chip design. Mentor Graphics has the broadest industry
portfolio of best-in-class products, and is the only EDA company with an embedded software solution.
Catapult™ C Synthesis
The Catapult™ C Synthesis product, is the only algorithmic synthesis tool that uses pure, untimed C++ to create
quality RTL descriptions up to 20 times faster than traditional manual methods. This significantly reduces
RTL implementation time, improves design flow reliability and shrinks hardware size.
Silicon Dimensions is developing tools that will streamline
the integrated circuit (IC) design closure process --
allowing logic design engineers to more efficiently
and cost-effectively plan the design of large ICs. These
tools will address problems which result in design schedule
slips, design closure issues, increased development
costs and general frustration in the IC design closure
process. The technology you can rely on for today's
180 nm and below high density technologies - developed
by designer engineers for design engineers."
Chip2Nite™
The Chip2Nite platform gives logic designers the necessary
tools and methodologies to perform early design planning
and analysis before hand-off to the physical design
team. The platform is available in various suites targeted
at identifying and solving design closure issues. By
providing logic designers with access to vital information
they never readily had, critical design errors can be
identified and resolved quickly eliminating costly iterations
from logic to physical design.
Synfora
is a privately held company that delivers the
first true "algorithm-to-tapeout" synthesis technology,
enabling designers to rapidly explore and implement
C algorithms in silicon. Synfora's algorithmic synthesis
technology - PICO (Program In Chip Out) - significantly
reduces both time to market and design risks by exploring
architecture alternatives and creating efficient RTL
code.
PICO Express
Pico Express is a potent combination of configurable IP and exploration and configuration tools that explores
and builds RTL directly from algorithm C descriptions. PICO Express takes algorithm descriptions expressed
in terms of sequences of nested loops and maps this to a highly optimized pipeline processor array (PPA)
architecture. PICO Express supports multiple loops with streaming data and creates a single, rate matched RTL
block. PICO Express provides extensive verification and integration capabilities to ensure that verification
and integration is minimized along with RTL creation.
Synosys
is the world leader in semiconductor design
software and also develops software that companies use
to design systems-on-chips (SoCs) and electronic systems.
The company sells its products to semiconductor, computer,
communications, consumer electronics, aerospace and
other companies that develop electronic products.
Discovery AMS
Discovery AMS is Synopsys' mixed-signal verification
solution based on industry leading golden simulators
VCS, NanoSim and HSPICE. These simulators are best-in-class
stand alone tools, and when unified in a common environment
provide a unique combination of accuracy, performance,
and capacity with the flexibility of simulating design
abstractions in any combination of Verilog, SPICE, Verilog-A
and Verilog-AMS.
Synplicity
is a leading supplier of innovative synthesis,
verification, and physical implementation software solutions
used by the world’s leading electronics companies. Synplicity
provides FPGA, Structured/Platform ASIC and cell-based/COT
ASIC designers with best-in-class, easy-to-use, and
reliable solutions that deliver extremely high quality
of results.
Synplify® DSP
The Synplify DSP solution accepts algorithmic specifications
from such tools as MATLAB®/Simulink®, and automatically
generates high-quality, optimized RTL for hardware implementation.
Tensilica's
mission is to provide configurable microprocessor
cores plus a complete and totally integrated suite of
software development tools for system-on-chip (SOC)
applications for high-volume markets. Tensilica solutions
allow designers to create lower power, foundry-independent
hardware and software specific to their applications.
Tensilica technology leverages proven ASIC design methods,
programming models and architectural standards to reduce
risk and development time.
XPRES Compiler
Tensilica's XPRES compiler enables rapid development
of optimized SoC devices. Designers enter their algorithms
directly in C or C++ and compiles these into an optimized,
pre-verified RTL description of an Xtensa LX processor
core.
Verisityis the leading supplier of Verification Process
Automation (VPA) solutions. Verisity’s best-in-class
technology and methodologies address one of the most
challenging business issues electronics companies face—verification.
Verisity’s solutions automate the process of identifying
flaws in electronics designs, enabling makers of the
world’s most sophisticated devices to reduce overall
product development costs, increase productivity and
accelerate time-to-market.
SpeXism
SpeXsim™, is Verisity's integration of our flagship
Specman Elite® with our third-generation Xsim® simulator.
This combination enables the mainstream engineering
community to adopt Verisity's world-class technology.
SpeXsim is offers high performance, out-of-the-box interoperability
and ease of installation.
