The seminars on this page were captured live at various locations in the U.S. and Europe. As with the live events, individual sessions run from thirty to sixty minutes each.
Aldec - SystemC ARM & Synopsys - DesignWare VIP Common Platform DVCon Conference Mentor Graphics - Hitchhiker's Guide to Verification Mentor Graphics - Questa Platform Computing - User Summit Si2 - OpenAccess Synopsys – Low Power Synopsys – Verification
COMMON PLATFORM:
Common Platform Technology Forum 2007

Common Platform alliance members, Chartered, IBM and Samsung, jointly hosted the first-ever Common Platform Technology Forum. Based on the popular day-long format that Chartered has presented for many years, the event provided access to executives, technologists, roadmaps and strategies from all three alliance members, plus their technology development partners. With a theme of "Accelerating the Future: Optimizing Silicon through Collaboration," the event focused on how the power of collaboration can help designers develop leading-edge electronic products.

SYNOPSYS:
Verification Methodology in System-to-Silicon Process

This talk addresses the ongoing, long term issues of the economics in design verification. Today, verification productivity does not scale. Some of the promising technologies that address cost of verification are discussed.

MENTOR GRAPHICS:
The Hitchhiker's Guide to Verification Seminar

If your last chip required a respin, and you know that there's a whole class of bugs that your testbench isn't set up to catch, and you don't have enough engineers to write all the tests you're going to need, then this seminar can help. Mentor gathered a team of verification experts whose presentations provide guidance on Testbench Automation, Reuse, and Functional Coverage.

ARM & SYNOPSYS:
Accelerate AMBA 3 AXI Design Verification with DesignWare

See how Synopsys DesignWare® VIP allows you to validate AMBA® 3 AXI™ protocol-based designs and reduce risk by increasing functional coverage.

MENTOR GRAPHICS:
Advanced Verification and How to Get Started with Questa

This seminar reviews advanced verification topics for complex SoC designs and how to use SystemVerilog to apply them in practical ways. It also shows what value the Questa verification platform provides for verification methodology and how to architect and assemble a testbench.

DVCON:
DESIGN & VERIFICATION CONFERENCE & EXHIBITION

The DVCon panels and presentations give updates on the progress in standardization and implementation of languages and methodologies that are emerging. The best of the EDA industry exhibit their tools and listen to improvements, requirements and suggestions from the very engineers who experience the fear and frustrations of SOC innovation.

ALDEC:
SystemC Seminar

This seminar provides an in-depth review of new verification methods including Co-Simulation with SystemC, Co-Verification with ARM and other system-level design and verification techniques. Sessions are aimed at helping engineers transition to faster verification techniques using their current design flow by providing practical approaches to system-level design.

Si2 / OPENACCESS:
Si2 OpenAccess Developers Forum

This all-day forum reviews developments in the OpenAccess platform itself, such as the
2.2 Release as well as new certification programs, a roadmap, and new applications and deployment experiences.

PLATFORM COMPUTING:
Platform User Summit - A Technical Forum on the Evolution of Platform LSF

In this five session seminar from Platform Computing, you’ll hear how Platform's production-proven
grid solutions, including Platform LSF® and Platform LSF Electronics Edition, are used by leading electronics companies to shorten product design and testing cycles, improve time-to-market, significantly reduce costs and deliver higher quality products. To simplify grid deployment, Platform has grid-enabled over 100 industry applications such as Altera, Cadence, Denali, IBM, Magma, Mentor, Nassda, Synopsys and Verisity.

     
     
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