TENSILICA: Diamond Standard Series Software Diamond Standard Series is a set of six off-the-shelf synthesizable cores ranging from low-power controllers to high-performance DSPs.   CADENCE: Global Route Environment technology for Cadence® Allegro® PCB design Discover a new route to advanced PCB design and layout and learn how using intelligent automation can eliminate manual processes while preserving the designer's intent.   CIRANOVA: PyCell Studio™ & PCell Xtreme™ PyCell Studio and PCell Xtreme provide a complete, interoperable OpenAccess PCell solution, including the ability to use PCells created in proprietary languages in multi-vendor OpenAccess flows.   ARC: The lowest power MP3 solution for SoCs This video demonstrates the power and ease of ARC's highly regarded ARChitect IP Configurator tool. CADENCE: Low-Power Solution The industry's first complete solution integrates logic design, verification, and implementation technology. SYNOPSYS: Power Management Solution Delivering the lowest power with the lowest risk, this end-to-end solution is proven and trusted by market leaders. BLAZE: Blaze Torch Technology Lithography-aware analysis and optimization technology for chip designers working with silicon technologies of 65nm and below.   SEQUENCE: DESIGN-FOR-POWER Attack the challenges of low power design holistically, from RTL to GDS. EMAIL ADDRESS USERNAME PASSWORD Forgot your password? Become a DOD member! 3/27/2008 - Analog Devices Fully-Programmable Audio ICs Deliver Advanced Features To Heighten HDTV Experience 3/26/2008 - CoWare CoWare and Sonics Release ESL 2.0 Upgrade of Joint Flow 3/25/2008 - ARC ARC-Based™ Sanyo Digital CameraWins Editors Choice Award in MacLife Magazine 3/25/2008 - Cadence Cadence Encounter Conformal ECO Designer Improves Logic Designers’ Productivity       THARAS SYSTEMS: Simulation Acceleration with Hammer New Hammer families for simulation acceleration & emulation deliver hundreds of kilohertz run time speeds and industry's fastest turn-around times.     BEACH SOLUTIONS: EASI-Studio™ A suite of tools that capture and validate embedded system specifications.   Synopsys Fellow Mike Keating addresses the long term issues in design for low power. Key technologies affecting or affected by low power design are discussed.   Mentor gathered a team of verification experts whose presentations provide guidance on Testbench Automation, Reuse, and Functional Coverage.     BLUESPEC SystemVerilog Training This 12 session Bluespec SystemVerilog training course is the standard intro that Bluespec provides to their customers.
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