Liberate™ and Variety™: Ultra fast IP Characterization Solutions from Altos Design Automation
This demo provides an in depth look at Liberate™ and Variety™, a new generation of IP characterization products from Altos Design Automation Inc. Utilizing Altos' novel "inside view" approach, the demo shows how characterization can be sped up significantly yet still yield the same accuracy with better model quality that existing approaches. The demo also highlights the challenges of modeling process variation and how Variety enables the creation of statistical timing libraries in order to reduce design guard bands thereby enabling faster timing closure and lower power consumption.
Solving D/MS Design Challenges with Virtuoso AMS Designer
Discover how you can effectively design mixed-signal chips, regardless of design size. Virtuoso AMS Designer
is the latest technological break through that brings the power of behavioral modeling to the IC designer.
It tackles the difficult challenge of converging massive digital designs with precise analog circuitry and simulating
them accurately and quickly, while using Verilog-AMS/VHDL-AMS languages, Virtuoso Schematic Editor schematics, Assura
extracted views, timing views from SoC Encounter, and textual descriptions for NC-Sim. (This demo features custom design products from IC 5.1.41 release)
HiPer Silicon for Analog/Mixed Signal IC Design
See Tanner EDA’s HiPer Silicon in action – a complete IC design suite consisting of tools for schematic capture,
circuit simulation, waveform probing, physical layout, foundry-compatible DRC, and verification. Learn how HiPer Silicon can help you increase productivity and
speed your design concept to silicon.