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DEMOS ON DEMAND™ on DeepChip     Bluespec ESL Synthesis Technical Overview The Bluespec toolset, the only ESL synthesis solution for control logic and complex datapaths, significantly accelerates hardware design and reduces verification costs. Bluespec presents hardware designers an exciting new way to implement a design with correct-by-construction control logic synthesis while retaining full control over the architecture and performance of the design.           Bluespec SystemVerilog Training Presenter: Rishiyur Nikhil This 12 session Bluespec SystemVerilog Training Course is the standard intro that Bluespec provides to their customers. Support resources for this training course including labs, downloadable PowerPoint slides, and documentation, are here. Lectures 1 - 3 • Lecture 1 - Introduction • Lecture 2 - Combinational Structures and Basic Types • Lecture 3 - Types   Lectures 4 - 6 • Lecture 4 - Module Hierarchy • Lecture 5 - Rules • Lecture 6 - Rule Scheduling   Lectures 7 - 8 • Lecture 7 - Modularizing Rules with Interface Methods • Lecture 8 - Performance Tuning using Rule Composition   Lectures 9 - 10 • Lecture 9 - more on Module Interfaces • Lecture 10 - Multiple Clock Domains   Lectures 11 - 12 • Lecture 11 - Compiling, Running and Debugging • Lecture 12 - Summary Conclusion to the training           More EDA Demos...
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