These demos present an in-depth view of various front end design products relative to design synthesis. Scroll down to view all demos or select a vendor name from the menu.
Bluespec Cadence
Bluespec Technical Overview
The Bluespec toolset, the only ESL synthesis solution for control logic and complex datapaths, significantly accelerates hardware design and reduces verification costs. Bluespec presents hardware designers an exciting new way to implement a design with correct-by-construction control logic synthesis while retaining full control over the architecture and performance of the design. This technical overview provides a review of the toolset, examples, technology and key benefits.

Free 12 session Bluespec SystemVerilog Training

Next-generation High Level Synthesis: Cadence C-to-Silicon Compiler
Cadence C-to-Silicon Compiler (CtoS) is next-generation high-level synthesis technology for automating SoC IP development and reuse. Using embedded logic synthesis, CtoS automatically generates synthesizable RTL and/or technology-mapped gates for both datapath and control functions, starting from timed and untimed C/C++/SystemC(r) algorithm descriptions. Using CtoS, designers can reduce engineering effort by up to 90%, while achieving quality of results at or above whatever is possible using best manual RTL coding practices.

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