AdvEDA is a start-up company in the domain of functional verification of hardware and software. AdvEDA helps both HW- and SW- developers to close the SOC verification gap by offering fast and fully integrated simulation and debugging tools. With these tools both the hardware and software of a System-On-Chip can be verified within one environment.

AdvEDA helps HW- and SW- developers to close the SoC verification gap with fast and fully integrated verification tools and enables a faster time-to-market for its customers.
Category: Front End - FV-HW/SW CoDesign/Verification
  Miss Univers is a complete HW/SW co-verification tool for multi-processor SOC architectures, offering extensive debug capabilities, fast simulation and emulation support. It includes an RTL simulator as well as a multi-core IDE with most fascinating debug features and configurable user-friendly graphical user interface.
3/4/2005 - AdvEDA
Adveda’s Univers multi-core Software IDE and HW/SW co-verification tool supports Altera’s Nios II Embedded Processor
5/31/2004 - AdvEDA
Adveda: SystemC model generator
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