ABOUT AXIOM (former @HDL)
Founded as @HDL in 1999, AXIOM pioneered development of advanced functional verification tools. The company’s mission has always been to accelerate the verification flow and to increase the overall productivity of verification engineers. AXIOM’s integrated verification environment combines the fastest simulator with advanced testbench automation, assertion based verification, debugging and coverage analysis to ensure that the most complex designs are fully verified in the least amount of time.
   
  DAC Booth Visit - AXIOM MPSim
 
@DesignerPro    
Category: Front End - FV-Debug Tools
  A next-generation graphical design and debugging environment that provides assertion based verification as well as support for both PSL and SystemVerilog assertions. @Designer-PRO works with VCS, NC-Sim / Incisive and ModelSim, and is tightly integrated with our @Verifier formal model checking family.
   
@Verifier    
Category: Front End - FV-Formal Tools
  The @Verifier suite is the most comprehensive assertion-based verification product available, supporting both PSL and SystemVerilog. As this demo shows, the suite includes @Verifier-DP for distributed processing on existing server farms, and @Verifier-ZX, adding the powerful formal solvers based on IBM RuleBase technology.
 
6/1/2004 - AXIOM
@HDL Selected by Azul Systems
6/1/2004 - AXIOM
@HDL selected by Ambarella
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