Fintronic USA Inc. is a provider of high performance Electronic Design Automation (EDA) tools. These tools are crucial for the design of digital circuits. The first step in the design of a digital circuit is to formally describe the desired functionality of the circuit in a Hardware Design Language, such as Verilog HDL. This description of the circuit is used as input to a simulator which will enable the designer to find out whether the described circuit is indeed what is needed. If not the specification (in the form of the Verilog description) is modified until it becomes acceptable. Once satisfied with the functionality, the designer refines and details this description to lower levels of abstraction (the "register transfer level" and the "gate level"), with the ultimate goal of creating a very simple description of the circuit which can then be sent to the fabrication facilities where the actual silicon chips are produced. During this process of refining the description of the design, the design engineer has to continue to simulate the circuit to ensure that the original functionality is still maintained.
Fintronic FinSim
Category: Front End - FV-Simulation
Booth Visit
Tour Super-FinSim's OVI-compliant Verilog compiler, simulation builder, simulation kernel, and the GUI that drives them. Fintronic's simulator has established itself as the primary simulator to fit this paradigm because of its low memory utilization and its support for 64-bit architectures which allow it to simulate even the largest circuits on a single computer.
11/30/2005 - Fintronic
Fintronic Announces Super FinSim integrated with SystemC
7/18/2003 - Fintronic
Fintronic Super Finsim Verilog Simulator Accelerated Through Tight integration with Novas Debussy Debug System
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