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System Interfaces - Demos on Demand™

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Product Demo: Spartan-3A Starter Kit
Eric Crabill, Staff Design Engineer
This presentation shows key examples of how the Spartan-3A Starter Kit delivers instant access to the powerful Spartan-3A FPGA device features of suspend power-saving mode, high-speed I/O options, DDR2 SDRAM memory interface, commodity flash configuration support, and FPGA/IP protection using Device DNA. The Spartan™-3A FPGA Starter Kit is a RoHS compliant, complete development solution which gives designers instant access to the capabilities of the Spartan-3A family. The kit includes Spartan-3A starter kit board, power supply with universal adaptors, programming cable, quick-start guide, evaluation software, collateral and more.
Memory Interfaces
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Product Demo: Memory Interfaces Solutions with Xilinx FPGAs
Adrian Cosoroaba, Solutions Manager
This demo overviews memory interfaces solutions from low cost implementations using Spartan 3A FPGAs to high performance solutions with Virtex-5 FPGAs. A design example with complete RTL and UCF files is generated using the Memory Interface Generator (MIG) software for the DDR2 SDRAM interface. Additionally, hardware system verification and a demonstration are performed using the ChipScopePro in circuit analyzer for a 667 DDR2 SDRAM DIMM interface with the Virtex-5 FPGA.
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Product Demo: Virtex-4 Memory Interfaces
Adrian Cosoroaba, Marketing Manager
This demo tours the 533 Mbps DDR2 SDRAM memory interface design using the Memory Interface Generator, a hardware system verification for the 300 MHz QDR II SRAM interface design using the ChipScope Pro in circuit analyzer and the Xilinx Advanced Memory Development System. Also included is a overview of the complete Memory Interface solutions using Virtex-4.
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Product Demo: System Performance Demo using Spartan-3 PCIe Starter Kit
Navneet Rao, Marketing Manager, Connectivity, Horizontal Platform Solutions
This performance demo, based on the Spartan-3 FPGA PCIe Starter Kit, shows system throughput of the PCI Express link in a 1-lane configuration. The Starter kit is plugged into a 1-lane PCIe slot in a commonly available desktop. The demonstration package includes a hardware design, a PCIe bus-mastering DMA validation function reference design, implemented as a user design behind the Xilinx PCIe IP LogiCORE that initiates the traffic between the add-in card and the system main memory. Software control is provided by a GUI, which controls the device driver and the application to run this demonstration.
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Product Demo: Spartan-3 PCI Express Starter Kit
Kourosh Matloubi, Xilinx Marketing Manager PCIe, RIO, ASI IPs
Bryan Fletcher, Avnet, Global Technical Marketing Manager

This compelling demonstration  includes two functional design demos using the Xilinx Spartan-3 FPGA and the PCI Express Core, an in-depth view of the board architecture, and an overview of the kit features and capabilities. The Spartan™-3 PCI Express Starter Kit is a complete development board solution giving designers instant access to the capabilities of the Spartan-3 family and the Xilinx PCI Express Core. The complete kit includes board, evaluation software and a resource CD  with application notes, white papers, data sheets.
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Product Demo: Practical Guide to Serial I/O Designs
Griff Derryberry, Application Engineering Manager, Mentor Graphics Corporation
In this presentation, Xilinx & Mentor Graphics will walk you through a serial interface design. We'll discuss the key challenges of this technology along with the practical techniques and solutions you can use to design successfully with SERDES interfaces. Included are best practices, such as advanced equalization and other jitter-mitigation techniques, for building high-performance designs.
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Product Demo: Virtex-4 Source Synchronous Interfaces
Greg Burton, Product Applications Engineer, Advanced Products Division
This module demonstrates the 700Mb/s SFI-4 interface and the 1 Gb/s SPI-4.2 interface designs using the ease-to-use Graphical User Interface (GUI) and the ML450 hardware platform. Also include in this module is an overview of the current Source Synchronous I/O (SSIO) design challenges, and how the high-performance Virtex-4 FPGA solves those challenges with the new ChipSync technology, embedded in every I/O block.
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